Building upon its recent release of QR factorization and inversion
cores, AccelChip has added Cholesky matrix factorization and matrix
inversion to its IP products.

"We are very proud to count John among Bell Labs researchers who have made
profound contributions to the field of statistics ," said Debasis Mitra, vice
president of Bell Labs' Mathematics Sciences Research group. Today, Bell Labs
researchers continue to conduct research in new networks and services, such as
IMS (IP Multimedia Subsystem), an industry standard way of building
next-generation networks; learning based anomaly detection; data analysis
tools; next generation wireless systems and Internet transport protocols;
algorithms for robust network design; stability of nonlinear optical networks;
optimization of supply chain networks and game-theoretic analysis of the
telecommunication market. For more information on Lucent Technologies, which has
headquarters in Murray Hill, N.

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, a leading provider of embedded DSP technology for
accelerating design, today announced its 2005. All other trade names referenced are the service marks,
trademarks, or registered trademarks of their respective companies. For more
information about Bell Labs, visit its Web site at http://www.

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Using the combination of application -specific cores with
AccelChip algorithmic synthesis, our customers find they require
minimal modification to their MATLAB and obtain optimized hardware
more quickly than with alternative methods.lucent.

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The 2005. The new interface automatically generates a verified System
Generator IP block from a floating -point MATLAB model, supporting both
cycle-accurate Simulink simulation and RTL generation within the
System Generator environment. The synthesis engine will then balance the data paths
to ensure correct behavior.

Pricing and Availability

Version 2005.

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Our AccelWare
toolkits include more than 50 AccelWare IP cores with over 110 unique
micro-architectures that are parameterized, reusable, and
retargetable. Event to Honor Bell Labs' John Chambers, Inventor of a Key Statistical
Language; Speakers Hail From Stanford, UCLA, Harvard,
University of Wisconsin and AT+T

MURRAY HILL, N.
Lucent Technologies designs and delivers the systems, services and
software that drive next-generation communications networks.

Biography and personal web pages of math professionals and enthusiasts, living and dead.

cryptographers equations

For more information on AccelChip DSP Synthesis and AccelWare
IP, please email sales@accelchip. Today, systems based on S, including S-Plus,
from Insightful, Inc.S. National Medals of Technology(R).com.

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These new offerings are added to AccelChip's
existing AccelWare toolkits--Building Block, Advanced Math,
Communications, and Signal Processing. QR provides
a general factorization method for square and rectangular matrices
without any symmetry restrictions." Chambers donated the proceeds from the prize to the
American Statistical Association to establish an annual prize for software
achievements.

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"IP is an absolute requirement for algorithm development and
implementation in DSP," said Michael Bohm, CTO and vice president of
Engineering, AccelChip.1 Provides Direct Path to Xilinx System Generator

As the result of joint development with Xilinx, AccelChip DSP
Synthesis 2005.accelchip." S, a
breakthrough language and system for statistical computing, began as a Bell
Labs research project in 1976. Topics to be covered include: the evolution of the S system,
statistical modeling, and statistical computing and graphics, as well as R and
other statistical systems.

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Business Editors/Technology Writers
Embedded Systems Conference San Francisco 2005

SAN FRANCISCO----

-- New AccelWare IP for Linear Algebra and Integration of MATLAB-
and Simulink-based Synthesis Accelerate DSP Design --

AccelChip Inc. (For further information, see "Xilinx and AccelChip
Deliver Industry's First Design Flow from MATLAB/Simulink and System
Generator to Verified FPGA System," dated March 8, 2005 . In addition, direct memory mapping of
two-dimensional MATLAB arrays is now supported for target
architectures that have dual port or single port RAMs and ROMs. Backed by Bell
Labs research and development, Lucent uses its strengths in mobility, optical,
software, data and voice networking technologies, as well as services, to
create new revenue-generating opportunities for its customers , while enabling
them to quickly deploy and better manage their networks.

mathematicians statisticians

"

QR and Cholesky Matrix Factorization and Inversion

Being able to select from among multiple micro-architectures for
blocks like matrix inversion and factorization is important in
achieving an optimum solution for a specific application.

2005. The company develops and markets design
tools, integrated verification flows, and parametric IP toolkits that
combine to automate the development and implementation of DSP
algorithms in FPGAs and ASICs., provide the most widely used software for research in
data analysis and statistics. in statistics from
Harvard University., USA, visit http://www.

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"By
allowing designers to create their own algorithms in MATLAB, explore
various implementations using AccelWare , and then incorporate the
blocks seamlessly into the rest of the system, this new flow
dramatically reduces our design time. The System Generator
Interface is a new option to AccelChip DSP Synthesis and starts at
$1000.

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Our DSP algorithm was already implemented in MATLAB,
and without this, we would have to handcraft black boxes in either
VHDL or Verilog for blocks not currently available with System
Generator," said Dale Kluesing, CTO of Photron Technologies. The 2005.1 release expands on the number of possible
solutions by graphically enabling users to insert pipeline stages on
critical paths. Current AccelChip customers on support will
receive the new release at no additional fee.

Bell Labs
scientists have received six Nobel Prizes in Physics, nine U.

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Matrix factorization and inversion are
used with algorithms utilizing linear algebra techniques, for example,
adaptive filters which are used in a wide range of applications from
radar to global positioning systems.

1 release also features new and enhanced cores that are
fundamental to the development of Software Defined Radio (SDR),
Digital Video Broadcasting, and other wireless communication
applications ."

Synthesis Extends Design Space Exploration

A great asset of architectural synthesis is the ability to rapidly
generate multiple hardware implementations of a design from an
algorithm ."
Chambers joined Bell Labs in 1966 after earning a Ph.D.

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Founded in 2000, AccelChip is located in Milpitas, California, and has
design centers in Portland, Oregon, and Carlsbad, California. He has spent more than 40 years conducting research in a
wide variety of data computing areas at Bell Labs, publishing more than
75 papers and authoring or co-authoring seven books.

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"Virtually every DSP design we see can take
advantage of cores to accelerate their development. Bell Labs Research and Advanced Technologies
President Jeff Jaffe will deliver a keynote address and Chambers, a Bell Labs
researcher emeritus, will provide remarks on the history and evolution of the
field of statistical computing.

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Additionally, the 2005.
In addition to S, Bell Labs has produced seminal contributions to
mathematical sciences, including: information theory, error-correcting codes
for communication systems, theory of complexity of algorithms,
multidimensional scaling, the FFT, teletraffic theory , queuing theory,
adaptive filters and statistical multiplexing of packets. It
has generated more than 30,000 patents since 1925 and has played a pivotal
role in inventing or perfecting key communications technologies, including
transistors, digital networking and signal processing, lasers and fiber-optic
communications systems, communications satellites, cellular telephony,
electronic switching of calls, touch-tone dialing, and modems.

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1 release of
AccelWare(R) intellectual property (IP) toolkits and AccelChip(R) DSP
Synthesis product.

Lucent Technologies' Bell Labs to Host Statistical Computing Workshop

, on April 29, and will feature talks from leaders in the
field from centers such as AT+T Labs, Stanford University, the University of
California, Los Angeles (UCLA), Harvard University and the University of
Wisconsin.

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1 version of the
AccelChip DSP Synthesis tool integrates the industry -leading,
algorithmic synthesis environment based on MATLAB with Xilinx (NASDAQ:
XLNX) System Generator , the industry-leading synthesis product based
on Simulink.1 of AccelChip DSP Synthesis and AccelWare IP
Toolkits is now shipping.
AccelChip's Web address is www., Lucent Technologies'
(NYSE: LU) Bell Labs will host an event in recognition of S system inventor
John Chambers, entitled "40 Years of Statistical Computing.

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Typical applications for the Cholesky approach include
parameter estimation and speech coding algorithms.com.

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S.bell-labs.

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New AccelWare cores extend the company's leadership
position in cores that directly implement matrix operations for
wireless communications, signal processing, and other forward-error
correction applications.J.

About Bell Labs and Lucent Technologies
Bell Labs is the leading source of new communications technologies.

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New cores support BCH decoding, BCH encoding,
scrambling, and descrambling. This release also features additional
micro -architecture configurations for the existing AccelWare FFT,
IFFT, and filters cores. Typical applications for the QR approach include
adaptive recursive filtering, channel estimation and equalization,
beam -forming, and image encoding algorithms. AccelChip's proven solution integrates
the domain-specific DSP design environment (MATLAB) with
industry-standard hardware design flows from Aldec, Altera, Cadence,
Mentor Graphics, Synplicity, Synopsys, The MathWorks, and Xilinx.com

AccelChip, AccelWare , and AccelView are registered trademarks of
AccelChip Inc. National
Medals of Science and eight U.

graph mathematical

While more processing-intensive
than Cholesky factorization, this method achieves more accurate
numerical precision. In contrast, Cholesky
factorization requires less processing and hardware resources than QR
because it takes advantage of the symmetry properties of the input
matrix. While traditional RTL synthesis tools have allowed area and
frequency tradeoffs, AccelChip DSP Synthesis enables system-level
tradeoffs, such as sample rate, latency, error, power, area and
frequency . is the industry's only provider of MATLAB-based
algorithmic synthesis solutions, including DSP intellectual property
(IP), for embedded DSP design.
The one-day workshop, chaired by Diane Lambert, director of statistics and
data analysis research at Bell Labs, will be held at Lucent's headquarters in
Murray Hill, N. In 1999, he became the
only statistician to win the Association for Computing Machinery (ACM)
Software System Award for his design of the S system, which the ACM cited as
an innovation that "has forever altered the way people analyze, visualize and
manipulate data. Lucent's customer
base includes communications service providers, governments and enterprises
worldwide.

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AccelChip Inc. Extends Leadership in Algorithmic Synthesis with New IP

)
AccelWare DSP IP cores produce the industry's only fixed-point,
hardware implementations of matrix inversion and matrix factorization .1 now provides the industry's first MATLAB/Simulink
design flow for implementation of high performance DSP systems in
FPGAs.com

About the Company

AccelChip Inc.J. "His visionary
leadership in the field of statistical computing has revolutionized a wide
variety of statistical applications in science, technology, manufacturing, and
business management.J.

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"The combination of AccelChip and AccelWare together with System
Generator allows us to rapidly build a prototype system that spans
multiple FPGAs.

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